Cornell Theory Center

What Is the IBM SP2? (Decommissioned at CTC in 2000)

The RISC System/6000 Scalable POWERparallel System, or SP, is a distributed memory machine from IBM. It consists of nodes (processors with associated memory and disk) connected by an ethernet and by a switch. The processors are POWER2 Super Chip (P2SC) architecture RS/6000 processors, which are superscalar pipelined chips capable of executing four floating point calculations per cycle. Each of CTC's 160 nodes has a large amount of scratch disk space, more than 1.8 GBytes, available to running applications.

The CTC machine has two types of nodes, known as thin nodes and wide nodes. Thin nodes run at 120 MHz, giving a peak performance per processor of 480 MFLOPS, and have 256 MBytes of memory. Wide nodes run at 135 MHz, giving a peak performance per processor of 540 MFLOPS, and have 1024 MB (1 GB) or 2048 MB (2 GB) of memory. The CTC configuration has 144 thin nodes and 16 wide nodes.

These nodes share data via message passing over a high performance two-level cross-bar switch. The TB3 switch adapter, which is the interface between the node and the switch, features a DMA (direct memory access) engine and peak hardware bandwidth on the order of 150 MBytes per second. With the earlier TB2 adapter and message passing libraries optimized for the switch, the typical bandwidth was previously 35 MBytes/sec, and the latency was around 50 microseconds.

The operating system for these processors is AIX, IBM's version of UNIX. C, C++, and Fortran are the programming languages most commonly used. Parallel programs on the SP use message passing libraries such as IBM's implementation of the Message Passing Interface (MPI) or the Oak Ridge National Laboratory's Parallel Virtual Machine (PVM). Higher-level parallel programming languages such as High Performance Fortran (HPF) are also available. Support for parallel programming is provided by a wide variety of tools for source analysis, automatic parallelization, performance monitoring, visualization, and debugging.

Last updated by Daniel Sverdlik 6/23/98